A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike a logic gate, which has a fixed function, a PLD has an undefined function at the time of manufacture.

Atmel CPLD Development Kit and programmer- ATF15xx-DK3-U This kit is the USB version of Atmel's ATF15xx-DK3 developmement kit. It includes a board with 44pin TQFP socket, a USB CPLD programmer (ATDH1150USB-K), two CPLD sample devices (ATF1502 and ATF1504) and links to all software needed to develop CPLD applications. Atmel CPLD Programmer - ATDH1150USB-K This is the updated ATDH1150USB CPLD programmer for In System Programming of Atmel ATF15xx CPLD chips. It uses Atmel ATMISP 7 software. Universal Programmers Our Universal programmers from Wellon support PLD and CPLD programmable Logic Devices, so if you want to program CPLD (Complex Programmable Logic Device), or 16V8, 20V8 or 22V10 PLD from other manufacturers, such as Lattice, then have a look at:. The Wellon programmer range are low cost and different versions support a wide range of flash, EPROM, DRAM, SRAM and EEPROM memory, PLD, CPLD, and microcontrollers.

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Atmel PLD devices Atmel simple PLD (Programmable Logic Device) such as 16V8 and 22V10 are flash based programmable logic, so are re-programmable 100's of times. They are configured using the CUPL Description language and can be equivalent to older PAL and GAL devices or used as 16V8 or 22V10 devices.

The 16V8 PLD is ideal for logic training and general electronics as it can be programmed to be logic gates, inverters, flip-flops and registers using the CUPL programmable logic description language. It, and other Programmable Logic Devices (PLD)like 22V10 also give security and flexibility to your electronic circuits. CUPL Description Language CUPL Programmable Logic Description Language is a compiler that converts logic equations into a Fuse map (JEDEC file) for the PLD programmer. Pins can be named using Kanda template, logic equations are simplified, Karnaugh maps can be employed and state machine techniques can be used. The full version of CUPL programmble logic description language has simulation tools for testing equations, syntax for state machines and support for CPLD.

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